A conventional semiconductor storage device employing a ferroelectric capacitor is shown in FIG. 31. In FIG. 31, numerals 1 to 3 respectively represent a semiconductor substrate, a source region and a drain region. Numerals 4 to 6 respectively represent a field insulator film for isolating elements, a gate insulating film and a channel region. Numerals 7 to 9 respectively represent a ferroelectric film, a gate electrode and an insulating film for insulating layers. Numerals 10 to 12 represent wiring of aluminium respectively for a source, a gate and a drain electrodes. Numeral 13 represents a passivation film.
When a voltage is applied between the gate electrode 8 and the semiconductor substrate 1, the ferroelectric film 7 is polarized. Once the film 7 is polarized, even if the applied voltage is made to 0V residual dielectric polarization remains there because of the hysteresis characteristics of ferroelectrics. When a voltage is applied between the source and the drain, the residual dielectric polarization induces electrons or positive holes at the channel region 6 at a surface of the substrate 1. Depending on the electrons or the positive holes, ON condition or OFF condition is switched between the source and the drain, whereby non-destructive reading out of storaged information can be carried out.
This conventional semiconductor storage device is produced as follows. The field insulator film 4 is formed on the substrate 1. The gate insulating film 5, the ferroelectric film 7 and the gate electrode 8 are formed in this order. Patterning is carried out so that the film 7 and the electrode 8 remain on the channel region 6. Impurity ion is implanted with the film 7 and the electrode 8 being used as a mask to form the source region 2 and the drain region 3. Finally the insulating film 9, the electrodes and the like are formed.
As ferroeletrics in the semiconductor storage device, PZT (Pb (Zr.sub.1-x Ti.sub.x) O.sub.3), PbTiO.sub.3 or the like having perovskite structure is utilized because of its high spontaneous dielectric polarization. However, these materials are not suitable for processing with etching or the like.
For fine processing of the materials, dry etching such as ion milling must be used. However, the ion milling is an ion beam etching with argon ion or the like, and for this reason high "selective ratio" can not be realized. The "selective ratio" means a ratio between etching rates of the ferroelectric film and the surroundings (the insulating film, the semiconductor and the like). Thus, the ion milling is apt to cause a damage to the surroundings. Particularly, when the gate insulating film 5 is thin and the ferroelectric film 7 on the film 5 is processed with the dry etching, too much etching breaks the film 5 and gives a damage to the substrate 1 to degrade transistor characteristic, on the other hand, insufficient etching causes the film 7 to remain.
Wet etching does not give a damage to the substrate 1 very much, however, it does not enable sufficient fine processing. Thus, wet etching is not suitable for processing a recent very large-scale integrated semiconductor device, because the device requires fine processing with accuracy of submicron order.